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Thread: What's $(MAKE) or ${MAKE} actually in makefile doing ?

  1. #1
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    What's $(MAKE) or ${MAKE} actually in makefile doing ?

    What's $(MAKE) or ${MAKE} in makefile actually performing in entire make building process. is it invoking a process which is similar to sub-routine i.e. in simplest terms 'call a function', or is it starting a recursive process to the beginning of its own file ?

  2. #2
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    Re: What's $(MAKE) or ${MAKE} actually in makefile doing ?

    Which "make" is being used?
    gmake? cmake? They probably behave differently.
    In gmake, it would call gmake with the arguments. Sorta recursive, but not really. More like a system() call. Often, it would be using a different default Makefile in a different directory (pwd).

  3. #3
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    Re: What's $(MAKE) or ${MAKE} actually in makefile doing ?

    GNU make
    Thanks a lot

  4. #4
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    Re: What's $(MAKE) or ${MAKE} actually in makefile doing ?

    If you post the makefile and any includes, someone might be able to tell what it is doing.

    I tend to create a makefile for each directory in my software projects, then at the top level directory, a makefile and controls building everything,packaging, and installation. Sometimes it will also perform DB setups or migrations from older versions of the software, updating the database tables as needed too.

    Most software projects have these directories:
    bin/
    lib/
    doc/
    man/
    inc/
    test/
    db/
    conf/

    Each of those would have a makefile to do something. Docs? Makefile? Sure - to translate a Markdown how-to into HTML or plain text. Might also take huge image files and optimize them for web viewing. Doing that in a lib/ directory wouldn't make sense.

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