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nolag
May 7th, 2011, 01:02 AM
This is my Makefile:


CXX = g++
LEXER = lexer
LEXFLAGS = -lfl

lexer: lex.yy.c badCode.h badCode.o
$(CXX) $(LEXFLAGS) lex.yy.c badCode.o -o $(LEXER)

badCode.o:
$(CXX) -c badCode.cpp

lex.yy.c:
flex lexer.l

clean:
rm *.o $(LEXER) *.yy.c


What I want:
If I edit badCode.c it should remake badCode.o and if I change lexer.l it should remake lexer.l

I was under the assumption that this was the whole reason for the make file, it would update the stuff that needs to be.

What it dose:
Won't remake lex.yy.c if lexer.l is changed and won't update badCode.o if badCode.cpp is changed. I don't get it please HELP

nolag
May 7th, 2011, 01:04 AM
Sorry I see my error.

dwhitney67
May 7th, 2011, 01:09 AM
Does your Makefile work if you "touch" (or modify) badcode.cpp?

Would your Makefile work if you had N-number of modules.?

P.S. You do not need to define CXX; 'make' is already aware of this.