64-Bit BARs (Base Address Registers)
Starting with native PCI Express GPUs, NVIDIA's GPUs will advertise a
64-bit BAR capability (a Base Address Register stores the location of a
PCI I/O region, such as registers or a frame buffer). This means that the
GPU's PCI I/O regions (registers and frame buffer) can be placed above the
32-bit address space (the first 4 gigabytes of memory).
The decision of where the BAR is placed is made by the system BIOS at boot
time. If the BIOS supports 64-bit BARs, then the NVIDIA PCI I/O regions
may be placed above the 32-bit address space. If the BIOS does not support
this feature, then our PCI I/O regions will be placed within the 32-bit
address space as they have always been.
Unfortunately, some Linux kernels (such as 2.6.11.x) do not understand or
support 64-bit BARs. If the BIOS does place any NVIDIA PCI I/O regions
above the 32-bit address space, such kernels will reject the BAR and the
NVIDIA driver will not work.
The only known workaround is to upgrade to a newer kernel.